Khushal Sethi

01 ABOUT

I'm the founder of Kiwi AI, where we develop AI-native infrastructure for revenue teams, and intelligent workflow automation.

My work sits at the intersection of computation, capital allocation, and engineered intelligence.

I've worked on accelerator architectures and systolic array performance modeling, but today my focus is broader: building tools that collapse complexity and compress the distance between thought and execution.

Long-term, I'm interested in metamachines — systems that automate the creation of other machines across industries.

CURRENTLY

Cofounder & Head of Engineering
Kiwi · 2024

PREVIOUSLY

Founder · GodelAI
Founder · DragonX Systems

PREVIOUSLY

Lead Design Engineer T3
Tensilica, Cadence · US

LIFE GOAL

Automate all work and eliminate human suffering.

EDUCATION

MS Stanford University
B.Tech IIT Delhi · AIR 79 / 1.5M

02 FOCUS

Chip Design Engines

Autonomous systems that translate high-level specifications into silicon-ready layouts. Intelligence at the physical layer.

Autonomous Workflows

Orchestrating complex multi-step processes that design, simulate, and manufacture — end-to-end, with minimal human-in-the-loop.

Intelligence Infrastructure

The intersection of code, capital, and computation. Building the substrate on which scalable intelligence runs.

03 PUBLICATIONS

ARXIV 2022

DRAGON (Differentiable Graph Execution): A suite of Hardware Simulation and Optimization tools for Modern AI/Non-AI Workloads

Khushal Sethi

PAPER

ARXIV 2022

Efficient On-Chip Communication for Parallel Graph-Analytics on Spatial Architectures

Khushal Sethi

PAPER

IEDM 2021

The future of hardware technologies for computing: N3XT 3D MOSAIC, illusion scaleup, co-design

RM Radway, K Sethi, W-C Chen, Jimin Kwon, S Liu, TF Wu, E Beigne, MM Shulaker, H-SP Wong, S Mitra

A-SSCC 2020

Compacc: Efficient hardware realization for processing compressed neural networks using accumulator arrays

Zexi Ji, Wanyeong Jung, Jongchan Woo, Khushal Sethi, Shih-Lien Lu, Anantha P Chandrakasan

ARXIV 2020

NV-Fogstore: Device-aware hybrid caching in fog computing environments

Khushal Sethi, Manan Suri

JETC 2020

GPUOPT: Power-efficient photonic network-on-chip for a scalable GPU

Janibul Bashir, Smruti R Sarangi

ARXIV 2020

Design Space Exploration of Algorithmic Multi-Port Memories in High-Performance Application-Specific Accelerators

Khushal Sethi

RESEARCH ABSTRACTS 2020

Reconfigurable cnn processor for compressed networks

A Ji, W Jung, J Woo, K Sethi, S Luc, A Chandrakasan

ISCAS 2019

Optimized implementation of neuromorphic HATS algorithm on FPGA

Khushal Sethi, Manan Suri

NOCS 2019

Power efficient photonic network-on-chip for a scalable GPU

Janibul Bashir, Khushal Sethi, Smruti R Sarangi

BIOCAS 2018

Low-power hardware-based deep-learning diagnostics support case study

Khushal Sethi, Vivek Parmar, Manan Suri

Chip Design Engines

Autonomous Workflows

Intelligence Infrastructure

DRAGON (Differentiable Graph Execution): A suite of Hardware Simulation and Optimization tools for Modern AI/Non-AI Workloads

Efficient On-Chip Communication for Parallel Graph-Analytics on Spatial Architectures

The future of hardware technologies for computing: N3XT 3D MOSAIC, illusion scaleup, co-design

Compacc: Efficient hardware realization for processing compressed neural networks using accumulator arrays

NV-Fogstore: Device-aware hybrid caching in fog computing environments

GPUOPT: Power-efficient photonic network-on-chip for a scalable GPU

Design Space Exploration of Algorithmic Multi-Port Memories in High-Performance Application-Specific Accelerators

Reconfigurable cnn processor for compressed networks

Optimized implementation of neuromorphic HATS algorithm on FPGA

Power efficient photonic network-on-chip for a scalable GPU

Low-power hardware-based deep-learning diagnostics support case study

Let's build somethingthat matters.

Let's build something
that matters.